University of Surrey Silicon Photonics Group

University of Surrey graduate School Conference

Congratulations to our PhD students Renzo Loiacono and Nathan Owens who won the prize for the best extended abstracts

submitted for the University of Surrey graduate School Conference. The conference took place on the 1st of June 2009 at

University of Surrey. The event featured a poster competition for the first year Ph.D. students and a call for extended abstracts

for the second year Ph.D. students, which also involved a peer review system coordinated by the University of Surrey Graduate

School tutors. Five abstracts were selected over more than fifty submissions from different departments as ATI, SSC, CCSR,

CVSSP, Physics Department and Mathematics Department.

18th Ion Beam Centre User Workshop Poster Prize

Congratulations to our PhD student Renzo Loiacono who won the poster prize at the Ion Beam Centre 18th Annual User

Workshop. The workshop took place in April 2009 at the University of Surrey and featured invited talks on a wide range of

subjects, from the uses of ion beams in forensic science, to the analysis of debris from meteorite impacts and the uptake of

chemotherapeutic drugs. Photonics and nanotechnology were also featured during the talks and the poster session. Renzo won

the first prize for his poster on the topic of ion implanted Bragg gratings in silicon waveguides. His project is jointly funded by

Intel Corporation and IeMRC.

Royal Society Research Fellowship

The Silicon Photonics Group is delighted to announce that our member Dr. Goran Mashanovich has been awarded a Royal

Society University Research Fellowship. Goran obtained his Dipl. Ing. and M.Sc. degrees in Electrical Engineering from the

Faculty of Electrical Engineering, University of Belgrade, Serbia. He joined our group in 2000 where he read for his PhD. On

being notified of his Fellowship, Goran commented "I am absolutely delighted that my application has been successful. I will

take a leading role in research in mid-infrared silicon photonics in the UK which has huge potential in fields such as

environmental sensing, communications and bio-medicine. The Fellowship will give me an opportunity to work with an

outstanding team of researchers from Surrey, UK, Europe, Singapore and North America, and to extend this network to other

parts of the world. The main focus of the research will be to develop a library of fundamental silicon photonics devices for the

mid-infrared with the aim of using them as building blocks for more complex structures such as environmental sensors for

example."

Silicon Photonics Awarded Major Research Funding

The Engineering and Physical Sciences Research Council (EPSRC) has awarded a grant valued at £5m to a consortium of

researchers in the UK, led by the University of Surrey, to work on Silicon Photonics. This is the largest current grant awarded by

the EPSRC through responsive mode in the Photonics area as the EPSRC moves towards encouraging the community to use

larger, longer responsive mode grants. The consortium, led by Professor Graham Reed, from the Advanced Technology

Institute (ATI), University of Surrey, includes researchers from St Andrews University (led by Professor Thomas Krauss), Leeds

University (led by Dr Robert Kelsall), Warwick University (led by Dr David Leadley), and Southampton University (led by Dr

Graham Ensell). Industrial representation within the consortium comes from QinetiQ (led by Professor Mike Jenkins). Silicon

Photonics promises to revolutionise the next generation of integrated circuits ICs by providing solutions for optical

interconnections between chips and circuit boards, optical signal processing, optical sensing, and the "lab-on-a-chip" biological

applications. It is also expected to provide low-cost optical signal processing chips that will interface with optical fibres brought

directly to the home that can take advantages of the enormous bandwidth of Fibre To The Premise (FTTP) technology. Silicon is

the material of choice for the microelectronics industry, partly due to the cost effective way in which it can be processed.

Therefore, integrating both optical functionality and electrical intelligence into the same silicon chip is expected to deliver a cost

advantage as compared to more conventional optical technologies. Professor Reed emphasised the importance of the grant by

stating, "We are delighted that the EPSRC has given us this exciting opportunity to contribute to the development of Silicon

Photonics to a level where it can have a positive impact upon people's lives. As a team we are committed to providing

technology suitable for industrial take-up."

CMOS Photonics project HELIOS awarded £8.5m research funding

Grenoble, France: 1 September 2008

The European Commission (EC) has launched in May 2008 a new CMOS Photonics project within the Information and

Communication Technologies (ICT) theme of the 7th Framework Programme (FP7).

The project HELIOS (pHotonics ELectronics functional Integration on CMOS) gathers 19 European partners and aims at

combining a photonic layer with a CMOS circuit by different innovative means. This 4-year project is coordinated by CEA-LETI

and has been awarded a grant valued at 8.5 Million Euros (Helios Website)

HELIOS will allow to combine a photonic layer with a CMOS circuit by using microelectronics fabrication processes. It will make

CMOS photonics accessible to a broad circle of users in a foundry-like, fabless way. The objectives of the project are manifold:

Development of high performance generic building blocks for a broad range of applications: WDM sources by III-V/Si

heterogeneous integration, fast modulators and detectors, passive circuits and packaging

The building and optimization of a complete production chain for complex functional devices. Integration of electronics and

photonics in a single chip will be addressed not only at process level but also through the development of an adequate design

environment

Demonstrating the power of this CMOS photonics production chain through several complex photonic ICs that address different

industrial needs. These include a 40Gb/s modulator, a 10x10 Gb/s transceiver, a Photonic QAM-10Gb/s wireless transmission

system and a mixed analog and digital transceiver module for multifunction antennas.

Investigating also some more promising but more challenging alternative approaches, such as silicon lasers and amorphous

silicon modulators. These concepts offer clear advantages in terms of integration on CMOS for the next generation of Photonic

ICs

Road mapping, dissemination and training, to strengthen the European research and industry in this field and to raise

awareness of new users about the interest of CMOS Photonics.

A large range of applications CMOS Photonics is an intensely active research topic that may lead to low-cost solutions for a

range of applications: optical communications, optical interconnections between semiconductor chips and circuit boards, optical

signal processing, optical sensing, and biological applications. By co-integrating optics and electronics on the same chip, high

functionality, high performance and highly integrated devices can be fabricated, while using well mastered microelectronics

fabrication process. Another advantage of CMOS photonics is that its success will move the emphasis from the component to

the architecture. In other words, industrial and RTD efforts could be focused on new products or new functionalities rather than

on the technology level.

The partners involved in the project HELIOS:

CEA-LETI (France), coordinator

IMEC (Belgium)

CNRS (France)

Alcatel Thales III-V lab (France)

University of Surrey (UK)

IMM (Italy)

University of Paris-Sud (France)

University of Valencia (Spain)

University of Trento (Italy)

University of Barcelona (Spain)

3S Photonics (France)

IHP (Germany)

University of Berlin (Germany)

Thales (France)

DAS Photonics (Spain)

Austriamicrosystems AG (Austria)

University of Vienna (Austria)

Phoenix BV (Netherlands)

Photline Technologies (France)